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| PL123-02N |  Non-PLL Fan-out buffer, 0-200MHz, Fan-Out 1:2 |
| PL123-05 | ZDB with internal feedback, 10-134MHz, Fan-Out 1:5 |
| PL123-09 | ZDB with internal feedback, 10-134MHz, Fan-Out 1:9 |
| PL123-09N | Non-PLL Fan-out buffer, 0-134MHz, Fan-Out 1:9 |
| PL123E-05 | High-performance ZDB, internal feedback, 10-220MHz, Fan-Out 1:5 |
| PL123E-09 | High-performance ZDB, internal feedback, 10-220MHz, Fan-Out 1:9 |
| PL123S-05 | Spread-compatible ZDB, internal feedback, 10-134MHz, Fan-Out 1:5 |
| PL123S-09 | Spread-compatible ZDB, internal feedback, 10-134MHz, Fan-Out 1:9 |
| PL133-27 | Ref. CLK 1 to 150MHz, 2 outputs, additive jitter <130fs |
| PL133-37 | Ref. CLK 1 to 150MHz, 3 outputs, additive jitter <70fs |
| PL133-47 | Ref. CLK DC to 150MHz, 4 outputs, additive jitter <60fs |
| PL133-67 | Ref. CLK DC to 150MHz, 6 outputs, additive jitter <60fs |
| PL135-27 | Ref. CLK 10 to 40MHz, 2 outputs, output-to-output skew <500ps |
| PL135-37 | Ref. CLK 10 to 40MHz, 3 outputs, output-to-output skew <250ps |
| PL135-47 | Ref. CLK 10 to 40MHz, 4 outputs, output-to-output skew <1ns |
| PL135-67 | Ref. CLK 10 to 40MHz, 6 outputs, output-to-output skew <1ns |
| PL560-09 | AFM VCXO, factor 4 multiplier, 300-800MHz LVDS type output, carrier 622.08MHz |
| PL560-3X | AFM VCXO, factor 4 multiplier, 120-320MHz PECL, LVDS, CMOS type output, carrier 155.52MHz |
| PL560-4X | AFM VCXO, factor 2 multiplier, 60-160MHz PECL, LVDS, CMOS type output, carrier 155.52MHz |
| PL560-6X | AFM VCXO, factor 2 multiplier, 150-400MHz PECL, LVDS type output, carrier 311.04MHz |
| PL565-08 | AFM VCXO, factor 4 multiplier, 300-800MHz PECL type output, carrier 622.08MHz |
| PL580-35 | PhasorV™ VCXO, input 19-40MHz, output 38-320MHz in LVPECL, LVDS or LVCMOS |
| PL580-37 | PhasorV™ VCXO, input 19-40MHz, output 38-320MHz in LVPECL, LVDS or LVCMOS |
| PL580-38 | PhasorV™ VCXO, input 19-40MHz, output 38-320MHz in LVPECL, LVDS or LVCMOS |
| PL580-39 | PhasorV™ VCXO, input 19-40MHz, output 38-320MHz in LVPECL, LVDS or LVCMOS |
| PL580-68 | PhasorV™ VCXO, input 20-40MHz, output 320-640MHz in LVPECL or LVDS |
| PL580-69 | PhasorV™ VCXO, input 20-40MHz, output 320-640MHz in LVPECL or LVDS |
| PL602-21 | HCSL-compatible PCIE clock generator, input 25MHz, output 100MHz, low jitter |
| PL602-22 | HCSL-compatible PCIE clock generator, input 25MHz, output 125MHz, low jitter |
| PL602-23 | HCSL-compatible PCIE clock generator, input 25MHz, output 200MHz, low jitter |
| PL602-26 | HCSL-compatible PCIE clock generator, input 25MHz, output 25MHz, low jitter |
| PL602-27 | HCSL-compatible PCIE clock generator, input 25MHz, output 250MHz, low jitter |
| PL610-01/02/03 | XO Clock, fully programmable, input 10-130MHz, output ≤130MHz (1.8-3.3V) |
| PL610-32/32A | XO Clock, 16.777216 MHz to 32.768 kHz 512 divider, ALC |
| PL610-33 |  XO Clock, 26.017792 MHz to 32.768 kHz 794 divder, ALC |
| PL610-61 | XO Clock non-programmable, input 10-60MHz, output ≤60MHz (2.5-3V) |
| PL610-62 | XO Clock, ÷2, non-programmable, input 10-60MHz, output ≤30MHz (1.62-3.63V) |
| PL610-63 | XO Clock, ÷4, non-programmable, input 10-60MHz, output ≤15MHz (1.62-3.63V) |
| PL611s-02 | Programmable Clock, PLL, input 10-200MHz, output ~200MHz in FSEL/PDB/OE |
| PL611s-02/03 | Programmable Clock, PLL, input 10-200MHz, output ~200MHz in FSEL/PDB/OE |
| PL611s-17 | Programmable Clock, PLL, input 1-200MHz, output ~125MHz in FSEL/PDB/OE |
| PL611s-18 | Programmable Clock, PLL, input 0.01-200MHz, output 0.5kHz~125MHz in FSEL/PDB/OE |
| PL613-01 | Programmable Clock, PLL, input 10-200MHz, output ~200MHz in LVCMOS |
| PL613-05 | Programmable Clock, PLL, input 10-200MHz, output ~200MHz in LVCMOS |
| PL663-0X | AFM XO, factor 2 multiplier, 60-160MHz PECL, CMOS type output, carrier 156.25MHz |
| PL663-1X | AFM XO, factor 2 multiplier, 150-280MHz PECL, LVDS, CMOS type output, carrier 212.5MHz |
| PL663-2X | AFM XO, factor 2 multiplier, 280-320MHz PECL, LVDS type output, carrier 311.04MHz |
| PL671-01 | Programmable Clock, PLL, input 1-200MHz, output ~200MHz, EMI reduction |
| PL671-02 | Programmable Clock, PLL, input 1-200MHz, output ~200MHz, EMI reduction |
| PL680-30 | PhasorV™ XO, input 19-40MHz, output 38-640MHz in LVCMOS/LVPECL/LVDS |
| PL680-37-38-39 | PhasorV™ XO, input 19-40MHz, output 38-640MHz in LVCMOS/LVPECL/LVDS |
| PLL602-00 | XO Clock + PLL, input 12-15MHz, output 12-200MHz in LVCMOS (Hi-Drive) |
| PLL602-30 | XO Clock + PLL, input 12-15MHz, output 0.75-800MHz in LVPECL, LVDS or LVCMOS |
| PLL602-35 | XO Clock + PLL, input 12-15MHz, output 0.75-800MHz in LVPECL inverted OE |
| PLL602-37 | XO Clock + PLL, input 12-15MHz, output 0.75-800MHz in LVCMOS |
| PLL602-38 | XO Clock + PLL, input 12-15MHz, output 0.75-800MHz in LVPECL |
| PLL602-39 | XO Clock + PLL, input 12-15MHz, output 0.75-800MHz in LVDS |
| PLL620-00 | XO Clock + PLL, input 100-200MHz, output 100-800MHz in LVPECL, LVDS or LVCMOS |
| PLL701-21 | Pin-programmable Clock, PLL+SST, input 24-200MHz, output 33-90MHz, EMI reduction |
